File:SGI Personal IRIS IP10 power connector J6 (schematic sheet 30).png
Summary
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Detail of the IP10 CPU board schematic (Personal IRIS 4D/25), sheet 30 of 31, I/O connectors: the J6 power connector with the 220 µF capacitors 03I4, A5K2, A5B7 and 02A2 on VCC (+5 V), the 33 µF capacitors 03J7 on +12 V and 03J5 on -12 V, remote sense pins 8 and 11, and the AC fail signal on pin 14 buffered by N7G6.
Source
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Rendered from SGI IP10 schematic 032-8029-001, revision 1, 9 May 1989, sheet 30 (File:SGI Personal IRIS IP10 CPU Board Schematic and Bill of Materials (032-8029-001).pdf), 2026-10-22.
Author
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Silicon Graphics, Inc.
Licence
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Copyright Silicon Graphics, Inc. Hosted for preservation and repair reference, with the source cited.
File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 00:49, 22 October 2026 | | 857 × 765 (32 KB) | Josh (talk | contribs) | Personal IRIS reference |
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