Atari Mega STE Schematic
The Mega STE schematic is Atari Corporation's circuit diagram of the Atari Mega STE main board, revision 2, dated April 1990 on its title blocks (20 and 25 April 1990 on different sheets). The drawing number is blanked out as C######-001. Eleven D-size sheets, scanned at 300 dpi without a text layer.
Contents
[edit | edit source]- Sheet 1: the MC68000 (U007, 68-pin PLCC), the cache (two 8K × 8 SRAMs U004 and U005, two 8K × 8 tag RAMs U008 and U009) and its PAL logic.
- Sheet 2: the reset and power-on circuits (LM556 at U201 with timing capacitors C208 and C218), the master oscillator (U204, 32.215905 MHz, or 32.084988 MHz for Peritel machines; a separate discrete oscillator with a 4.433618 MHz crystal is fitted to PAL machines), the 68000 bus buffers, the 12-way power connector J201 (pin 1 Power Good, 2 and 10–12 +5 V, 3 +12 V, 4 −12 V, 5–8 ground, 9 −5 V), the power-LED header J290 and the auxiliary fan header J291 on +12 V, the cartridge port J202 fed through fuse F21 (0.5 A), the two TOS ROM sockets U206 and U207, and the ROM jumper table for W201–W203.
- Sheet 3: the two MC6850 ACIAs (MIDI U303, keyboard U304), MIDI in and out, the keyboard socket J303 with its 0.5 A fuse F31, the sound generator U305 and parallel port, and the MC68901 MFP (U306) with its serial port (1488 and 1489 line drivers).
- Sheet 4: the RP5C15 real-time clock (U402), its 32.768 kHz crystal and trimmer, the battery connector J401 and diode D401; the DMA controller (U404), the hard disk port and internal ACSI header; the WD1772 floppy controller (U405) and the internal and external floppy connectors; the 16.021226 MHz oscillator U408.
- Sheet 5: the GSTMCU (U501), the Shifter (U502), the video output stage and 13-pin monitor socket, and the MC1377 colour encoder and RF modulator, fitted to modulator machines only.
- Sheet 6: DMA sound: two DAC0802 converters, MF4 filters, LF347 op-amps, the LMC1992 (U608), the 8.2 V regulator U609 (LM78L82) and the RCA outputs J603 and J604. A note of 14 February 1990 explains a 74LS02 added to cure a sound-data hold problem with Shifters older than revision D.
- Sheet 7: the four SIMM sockets U701–U704 and the eight-way "ID DIP switch" S701, read through a 74LS244 and hand-annotated "7 = Enable HD-drive (1.44MB)".
- Sheet 8: the system control unit (TTSCU, U801) and the VME and SCC interrupt lines.
- Sheet 9: the VMEbus buffers and the two 50-way connectors J901 and J902. A note says J901 pin 34 is open on the Rev 1 board and should be jumpered to U904 pin 19.
- Sheet 10: the Z85C30 SCC (UA04), its 3.672 MHz oscillator (UA12), serial port A (header JA02), serial port B (9-pin D, JA03) and the LAN port (8-pin mini-DIN, JA01) with 26LS30 and DS34F86 RS-422 buffers.
- Sheet 11: the MC68881 socket (UB02, PLCC) and its PAL (UB01). "UB01 need not be installed if UB02 is not present."
What this schematic does not contain
[edit | edit source]- No parts list and no Atari part numbers for the custom chips.
- No voltage ratings for the capacitors. Electrolytic values are given (for example C227 470 µF on +5 V at J201), but the rating has to be read from the fitted part.
- No power supply schematic; the supply connects through J201.
- No board drawing or silkscreen. The board number C301564 is recorded by atari-computermuseum.de, not on the drawing.
- Revision 2 only. Later boards are known to differ: Atari's 1.44 MB floppy manual refers to main boards below and above Rev B, and its coprocessor kit manual to boards with and without jumper W3.
Pages that cite this document
[edit | edit source]- Atari Mega STE: device locations, cache, memory banks, sound, LAN, VME and the clock circuit.
- Atari Mega STE Troubleshooting Guide: power connector pinout, clocks, reset, fuses, ROM jumpers, SIMM banks, serial and FPU faults.
- Atari Mega STE Capacitor Replacement Guide: the main-board electrolytic capacitors.
- Atari Mega STE General Maintenance: the clock battery connector and fuses.
Download: Atari Mega STE Schematic Rev 2.pdf