File:SGI IRIS Indigo IP12 (HP1) CPU board schematic (032-8044-003 rev C).pdf
Summary
[edit | edit source]Silicon Graphics schematic for the HP1 board, drawing number 032-8044-003 revision C, dated 31 October 1991, 36 sheets. HP1 is the IP12 CPU board of the IRIS Indigo R3000. The sheets cover the CPU and FPU, cache, memory drivers and banks, Ethernet, SCSI, keyboard and mouse, boot PROM and real-time clock (sheet 16), serial ports, clocks, GIO and backplane connectors, reset and LED, the audio power supply (sheet 29) and the audio and DSP circuits. A scan; text in the PDF is not searchable.
Source
[edit | edit source]bitsavers, bitsavers.org/pdf/sgi/indigo/HP-1_Schematic.pdf (retrieved 2026-10-22).
Author
[edit | edit source]Silicon Graphics, Inc.
Licence
[edit | edit source]Copyright Silicon Graphics, Inc. Hosted for preservation and repair reference, with the source cited.
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| Date/Time | Dimensions | User | Comment | |
|---|---|---|---|---|
| current | 00:13, 22 October 2026 | 0 × 0 (2.94 MB) | Josh (talk | contribs) | Upload for SGI Indigo pages |
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