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Optimizing PowerPC Code 1995

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Optimizing PowerPC Code: Programming the PowerPC Chip in Assembly Language is a book by Gary Kacmarcik, published by Addison-Wesley, first printing April 1995, ISBN 0-201-40839-2, Library of Congress card number 94-10489. The text and index are numbered to p. 694; the scan has 692 PDF pages.[1]

The book covers PowerPC assembly language and code optimisation. Its timing chapter is specific to the PowerPC 601, the processor in the first Power Macintosh models; Appendix A is an instruction set summary of almost 300 pages.[1]

Contents

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  1. Introduction (1)
  2. PowerPC Architecture Overview (9): data organisation, functional units, processor registers, 32- versus 64-bit implementations
  3. Instruction Set Overview (27), including obsolete and optional instructions
  4. Branch and Trap Instructions (35)
  5. Load and Store Instructions (57)
  6. Integer Instructions (75)
  7. Rotate and Shift Instructions (93)
  8. Floating-Point Instructions (135)
  9. System Register Instructions (159)
  10. Memory and Caches (173)
  11. Pipelining (201)
  12. PowerPC 601 Instruction Timing (215)
  13. Programming Model (251): register conventions, the TOC, stack frames, calling conventions
  14. Introduction to Optimizing (295)
  15. Resource Scheduling (305)
  16. More Optimization Techniques (341)

Appendices: A Instruction Set Summary (353); B Complete List of Mnemonics (643); C Register Bit Definitions (669); D Optimization Summary (677); E References & Further Reading (679); Index (681).[1]

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Download: Optimizing_PowerPC_Code_1995.pdf (201 MB)

References

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  1. ↑ 1.0 1.1 1.2 Gary Kacmarcik, Optimizing PowerPC Code, Addison-Wesley, 1995, ISBN 0-201-40839-2. Title and copyright pages (PDF pp. 2-3), contents (PDF pp. 5-8), index pp. 681-694.
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