SGI IRIS 1000 General Maintenance
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Care of the SGI IRIS 1000 series (the 1000 and 1200 terminals and the 1400 and 1500 workstations). No SGI owner's or service manual for these machines has been found online. The settings and handling rules below come from SGI's field-service technical aids of 1984 and 1985, reproduced in its later 68020 training course.[1]
Handling boards
[edit | edit source]- SGI singled out the GF1 graphics board as sensitive to static. Store spare boards in anti-static bags, work on a grounded conductive mat with a wrist strap connected to the system frame, and move the faulty board straight into an anti-static bag once it is out.[2]
- The PM1-to-I/O cable (5000-210) scrapes against the component leads of the board in slot 1 as that board is moved, which can damage the cable; hold the cable out of the way when working on slot 1.[3]
- When a memory board is replaced, its switch and jumper settings must match those of the board it replaces.[4]
Slot rules and backplane jumpers
[edit | edit source]In the 10-slot IRIS 1000 the P2 bus is split into a processor bus and a raster bus by cuts in the backplane: all 60 P2 traces are cut between slots 3 and 4, and four traces between slots 4 and 5 and between 5 and 6. Slots 1 to 3 are processor-bus slots, slots 6 to 10 raster-bus slots, and slots 4 and 5 are set by jumpers on the backplane:[5]
- processor-bus boards (Ethernet, I/O controller, memory) in slots 4 and 5: jumper slot 3 to 4 and 4 to 5;
- raster-bus boards (bitplanes) in slots 4 and 5: jumper slot 6 to 5 and 5 to 4;
- a processor-bus board in slot 4 and a raster-bus board in slot 5: jumper slot 3 to 4 and 6 to 5.
SGI's typical layout is PM1, Ethernet and I/O in slots 1 to 3, memory in slot 4, BP2 bitplanes in slots 5 to 7, then the DC3, UC3 and GF1 in slots 8, 9 and 10.[5] The PM1 must be to the left of every DMA controller (Ethernet, disk controller), because it needs the highest bus priority.[5] The GF1 runs hotter than the other boards and must stay in the slot with extra airflow: slot 10 in the Model 1000 and slot 20 in the Model 1200.[6]
PM1 switch
[edit | edit source]The switch on the PM1 board is ORed with the configuration switch on the I/O panel, so a wrong setting on the PM1 defeats the panel switch. SGI's rule is to set all PM1 switch positions open except position 1, which is closed. The positions of the two switches are numbered differently; SGI's technical aid GEN-009 maps them, and toggling the matching PM1 position is a way to test a suspect panel switch.[7] The panel switch settings are on SGI IRIS 1000 Troubleshooting Guide#Configuration switch.
Memory boards
[edit | edit source]The 512 KB Multibus memory board (SGI part 93-0001) answers to an address range set by switches SW1 and SW2 and by wire-wrap jumpers E16 to E20:[4]
| Board | Address range | SW1 (8 to 1) | SW2 (8 to 1) | Wire-wrap |
|---|---|---|---|---|
| 1 | 000000–07FFFF | 01111111 | 00000000 | None |
| 2 | 080000–0FFFFF | 11111111 | 10000000 | None |
| 3 | 100000–17FFFF | 01111111 | 00000000 | E16 to E20 |
| 4 | 180000–1FFFFF | 11111111 | 10000000 | E16 to E20 |
[4] A wrong setting gives either duplicated addresses or a gap, with the memory above the gap not responding. E16 and E20 are the two outer pins between ICs Z13 and Z14.[4]
When a 1000 or 1200 terminal is upgraded from GL1 to GL2 software, a 1 MB Multibus memory board (5001-173-08) must be modified by resoldering pins P2-55 and P2-56. GL1 machines leave the two top address bits unconnected to reduce noise, and GL2 uses them.[8]
Ethernet board
[edit | edit source]The Excelan EXOS/101 board must be set for address 0, interrupt level 2, 24-bit addressing and its Multibus interface connected to BPRO/. SGI's technical aid lists the only jumpers to fit as JU22 (interrupt level 2), JU29 (24-bit addressing) and JU30 (BPRO/), referring to page 136 of the EXOS/101 reference manual.[9]
GF1 boards and the backplane voltage limiter
[edit | edit source]Some GF1 boards have Geometry Engines that need 4.1 to 4.3 V on the backplane. Boards with four jumpers at location H13J have 5 V engines and work in any machine; boards without them have 4 V engines and need a voltage-limiting diode assembly on the backplane, which IRIS machines shipped before February 1984 lacked until a field change order added it. Spare boards were supplied with 5 V engines.[10]
Port 2 DTR
[edit | edit source]On early 1000 and 1200 machines, the DTR signal is not present on the back-panel port 2 connector, which some host software needs. SGI's fix is a jumper wire on the PM1 board at H2A, pins 7 to 8; later boards had it fitted at the factory.[11]
Mouse and 1400 drives
[edit | edit source]- SGI's mouse-cleaning procedure, written for all IRIS models, is on SGI IRIS 3000 General Maintenance#Keyboard, mouse and media.[12]
- Vertex traced noise problems on the 1400's V100 disk drive to a missing felt pad between the spindle grounding contacts, which come through the logic board above chip V32; SGI's fix was to fit the pad.[13] On some Vertex drives the copper grounding strap on the spindle lacked its foam backing; SGI's fix was to glue a piece of foam in place and adjust the strap.[14]
- For a Vertex V100 with a DIP switch in configuration socket J6, pin 1 of the switch must be in pin 1 of the socket; drive 0 has switches 4 and 8 on, drive 1 switches 4 and 7 on, and all others off. A switch fitted backwards makes the drive recalibrate continuously and the machine will not boot.[15]
Related pages
[edit | edit source]- SGI IRIS 1000
- SGI IRIS 1000 Troubleshooting Guide
- SGI IRIS 1000 Capacitor Replacement Guide
- SGI IRIS 2000 General Maintenance
References
[edit | edit source]- ↑ Silicon Graphics, IRIS Workstation Course, 68020 Based, Student Workbook part 2, lesson 7 technical aids (File:SGI IRIS Workstation Course 68020 Based Student Workbook Part 2.pdf).
- ↑ SGI Field Engineering, Technical Aid GEN-007, "GF1 Board Static Sensitivity", IRIS 1000 and 1200, 25 January 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-008, "PM1-I/O Cable Abrasion", IRIS 1000 and 1200, 26 January 1984, in Student Workbook part 2.
- ↑ 4.0 4.1 4.2 4.3 SGI Field Engineering, Technical Aid GEN-005, "512K Multibus Memory Board Addressing", IRIS 1000 and 1200, 20 January 1984, in Student Workbook part 2.
- ↑ 5.0 5.1 5.2 SGI Field Engineering, Technical Aid GEN-004, "Backplane Cuts and Jumpers", IRIS 1000, 23 January 1984, pages 1 to 3, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-006, "GF1 Board Cooling", IRIS 1000 and 1200, 23 January 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-009, "PM1 Board Switch Settings", IRIS 1000 and 1200, 7 February 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-028, "Multibus Memory Board Modification", 1000 and 1200, 28 March 1985, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-011, "Excelan Jumper Configuration", 1000 and 1200, 17 February 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-010, "Backplane Voltage Limiter for GF1 Board", IRIS 1000 and 1200, 13 February 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid I/O-002, "Serial Port (DTR)", IRIS 1000 and 1200, 18 January 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-003, "Mouse Cleaning Procedure", all IRIS models, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid IO-007, "Vertex V100 Noise Problems", 1400, 12 July 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid GEN-020, "High pitched noise from hard disk", 1400, 21 August 1984, in Student Workbook part 2.
- ↑ SGI Field Engineering, Technical Aid IO-006, "Vertex V100 Drive Configuration Dipswitch", 1400, 12 July 1984, in Student Workbook part 2.